Dolphin Integration, provider of 8 and 16-bit microcontroller cores beyond the intel 51 legacy, is releasing the SmartLink (S-Link), cost-effective USB adapter for faster on-chip debug of application programs. S-Link grants speed through its Two-Wire Interface for debuG (TWIG) protocol enabling: 10 steps/sec. versus 3 steps/sec. with the JTAG protocol < 50 ms/instruction in step-by-step […]
Dolphin Integration has participated in the Techdays of the Aerospace Cluster in Rhônes-Alpes on the 14th of February at the CCI in Lyon, showing with its partners the achievement at integrating high performances MEMs analog front-end for Gyroscopes in a state-of-the art ASIC. It is the result of a couple of years of collaboration within
IMU experience presented in the Techdays of the Aerospace Cluster In Rhône-Alpes Read More »
The high density and low power architecture RHEA for SpRAM is now available in the eFlash process variant for the 90 nm and 55 nm nodes. This SpRAM is designed to reach the highest density and gains from 10 to 20% versus alternative solutions in 90 nm and 55 nm. IMAGE A INSERER Dolphin Integration’s
Dolphin Design confirms the strengthening of their partnership with STMicroelectronics and the growth of their Custom Fabless activity by going to the next step in their offering of Multi-Project Wafer: myMPW+. Complementary to general purpose Grenoble offering from the CMP (Circuits Multi-Projets), myMPW+ consists in a secured Multi-Project Wafer run yearly at STMicroelectronics in 65nmLP,
myMPW+ : a complementary offer targeting ST65nm process Read More »
Dolphin Intégration a reçu du Ministère de l’Enseignement Supérieur et de la Recherche la notification du renouvellement de son agrément CIR (Crédit Impôt Recherche) pour les années 2014, 2015 et 2016. Les travaux confiés aux équipes de Dolphin Intégration pour la conception de vos circuits ASIC/SoC innovants sont donc éligibles à votre assiette CIR.
Renewal of CIR agreement Read More »
Dolphin Integration, leader in embedded power management IP, today announced the Retention Alternating Regulator (RAR) as a fully integrated, secure and power-efficient solution for supplying loads requiring multi-mode optimization, with a low Bill-of-Material. Applications running up to years on battery require, on the one hand, high efficiency in normal mode due to large power dissipation
With the goal of improving drastically the PPA mix (Power x Performance x Area) of Non Volatile Memories (NVM) like eFlash or EEPROM, Dolphin Integration announces today R-Stratus-LP, new generation of cache controller. R-Stratus-LP provides advanced NVM based devices architecture with outstanding gains: Power consumption of embedded or external NVM may be divided by 3X
Dolphin Integration present their positioning in the Custom Fabless activity as highlighted within the EDA SoC project of the European Defense Agency. Acting as prime contractor, Dolphin Integration may allow customers to accede to foundries for their ASIC/SoC for industrial, aeronautical and military markets regardless of their fabrication volumes. Such an offering, gathering all expertises
Dolphin Integration at the Forum DGA Innovation Read More »
Dolphin Integration rolls out sDACa-MT1.01, an ultra dense Pulse Width Modulated DAC for audio applications embedding valuable features for easier SoC integration while supporting sound amplifiers with both analog and digital inputs: Support both line-out and power amplifiers Anti Pop-up Noise control signal Spread-spectrum feature for safe integration with RF emitter/receiver PLL-less feature to prevent
Dolphin Integration, the innovator of Virtual Components for optimizing power-consumption and density of subsystems, today announces the latest generation of 6-Track standard cell libraries in mature processes, with enhanced features to enable further power and area savings with also timing improvements. Designed around ultra dense sequential cells, celebrated as the patented spinner cell system, this
© 2022 Dolphin Design SAS – All Rights Reserved.